1. Field of the Invention
The present invention relates to a packaging substrate, more particularly, to a packaging substrate with electrostatic discharge protection.
2. Description of the Related Art
The working voltage of an integrated circuit is typically of 5 volts or less. When the integrated circuit is applied with relatively higher voltage, the integrated circuit will usually be damaged. Static electricity is generated from friction, induction and contact; but the popularly used chips are rarely designed with a circuit for electrostatic discharge protection to safeguard against damage to chips from static electricity. Most chips are not equipped with such an electrostatic protective circuit.
In addition, during the process for packaging or molding the dies, when the mould compound is injected to package the die, static electricity will be generated from the friction, induction and contact between the mould compound and substrate or other medium. The electrostatic discharge will damage the die and fail the semiconductor package products.
Therefore, it is necessary to provide an innovative and advanced packaging substrate so as to solve the above problem.
One objective of the present invention is to provide a packaging substrate with electrostatic discharge protection. Each of the mold gates on the substrate is electrically connected to a first copper-mesh layer on the periphery of a top side of the substrate. When static electricity is generated during the molding process, static electric charges will be conducted from the mold gate to the first copper-mesh layer. The static electric charges are collected and restricted to a capacitor formed by the first copper-mesh layer, a dielectric layer and a second copper-mesh layer, and are discharged via a metal pad and supporter. Therefore, basing on capacitor effects, the static electricity generated during the molding process can be safely conducted away from the substrate, preventing the dies to be packaged from damage due to electrostatic discharge so as to raise the yield rate of semiconductor package products.
Another objective of the present invention is to provide a packaging substrate with electrostatic discharge protection. The packaging substrate utilizes a through hole, that goes through the first copper-mesh layer and the dielectric layer to the second copper-mesh layer, and electrically connected die first copper-mesh layer and the second copper-mesh layer. When static electricity is generated during the molding process, static electric charges will be conducted from the mold gate to the first copper-mesh layer, and will be conducted via the first copper-mesh layer, the through hole, the second copper-mesh layer, the metal pads to the supporter. Therefore, by the conductive effects, the static electricity generated during the molding process can be safely conducted away from the substrate, preventing the dies to be packaged from damage due to electrostatic discharge so as to raise the yield rate of semiconductor package products.